Write & simulate
Edit Verilog, SystemVerilog, or VHDL. Create a clock/reset testbench scaffold, inspect waveforms, or interact with virtual hardware.
Allora FPGA · Desktop beta
RTL.
Extensive Design Tools.
Full FPGA Build and Program Pipeline.
Write RTL, simulate a RISC-V system, inspect your logic, and build for supported FPGAs. One desktop workspace, connected by the tools in Allora Link.
Active development. Physical board programming is not yet hardware verified. Read the beta notes →
Allora’s proprietary design tools
Meet Allora Link.
A connected set of tools for turning ideas into designs, testing behavior, and understanding what you build. Pick a tool to look inside.
Allora Link connects Allora’s tools with third-party engines and cores, including Codex, Yosys, Verilator, PicoRV32, and SERV.
The connected workspace
Less switching.
More understanding.
Allora Link lives alongside the everyday FPGA workflow: Editor, Testbench, Synthesis, Pin Mapping, Bitstream, and Program.
Map & migrate
Assign buses with preview and undo. Move a design into a separate board project with the Board Migration Assistant and review unresolved mappings.
Build & inspect
Synthesize, place and route, and pack bitstreams through the open toolchain. Reuse cached synthesis and inspect timing, artifact details, and Build History’s resource and frequency trends.
Keep your context
Publish projects to GitHub, return to saved AI conversations, and move through the shared dock. Serial Monitor and Live Register Shell stay with Program.
Find your target
A growing board catalog.
Explore open build flows and a wider collection of pin mappings. Catalog support describes software capabilities; it does not establish physical programming verification.
Explore FPGA boards— open build entries · — pin-mapping entries
Open build flowPin mapping
No boards match that search.
Build with us
A beta.
An open invitation.
Allora is a free app under active development. Features are still evolving, and no board’s programming flow is fully verified on physical hardware yet. A successful build or simulation does not guarantee a working board program.
When downloads open, try it with a supported board and tell us what worked and what didn’t. Share your board and revision, macOS version, steps, and relevant logs so we can reproduce the result. Community feedback will help Allora improve.
A public feedback channel will accompany the first packaged beta.
Allora FPGA for macOS
Your next design
starts here.
The Mac installer is being prepared. Download availability and setup requirements will appear here when it is ready.
Hardware programming verification isn't complete.
FPGA toolchains are required for their respective workflows. AI Design Studio requires provider setup and sign-in.